An Optimized Design Flow for Fast FPGA-Based Rapid Prototyping
نویسندگان
چکیده
In this paper, we present an optimized design flow to map Register-Transfer-Level (RTL) netlists onto multiple-FPGA architectures. Our FPGA-dedicated method fully exploits design structure by letting the basic design steps technology mapping, hierarchical partitioning, floorplanning and signal flow driven placement, interact. This efficiently reduces runtime and yields design implementations of higher performance and better resource utilization than published before.
منابع مشابه
Self authentication path insertion in FPGA-based design flow for tamper-resistant purpose
FPGA platforms have been widely used in many modern digital applications due to their low prototyping cost, short time-to-market and flexibility. Field-programmability of FPGA bitstream has made it as a flexible and easy-to-use platform. However, access to bitstream degraded the security of FPGA IPs because there is no efficient method to authenticate the originality of bitstream by the FPGA pr...
متن کاملFPGA-based Prototyping of IEEE 802.11a Baseband Processor
Abstract: In technical literature and especially in domestic, predominant way to examine performance of 802.11a-based systems are experiments in simulations. In this paper, we present FPGA based 802.11a prototype, which gave us a possibility to gain closer insight into the problems of OFDM system implementation. A specific design of baseband modem physical layer is discussed, along with the pre...
متن کاملHow Fast Is Rapid FPGA-based Prototyping: Lessons and Challenges from the Digital TV Design Prototyping Project
This paper presents a case study targeting the Aptix MP4 board and Xilinx VirtexE FPGAs, for digital TV application prototyping. The difficult FPGA prototyping issues typically encountered by engineers are illustrated on a big industrial example. Due to the increasing ASIC complexity, the basic challenge was to meet the project deadlines. To enable faster FPGA-based prototyping, both the ASIC d...
متن کاملModular Asynchronous Network-on-Chip: Application to GALS Systems Rapid Prototyping
This paper presents an innovating methodology for fast and easy design of Asynchronous Network-on-Chips (ANoCs) dedicated to GALS systems. A topologyindependent building-block approach permits to design modular, scalable and reliable ANoCs with low-power and low-complexity requirements. A crossbar generator is added to the existing design flow for fast system architecture exploration. A multi-c...
متن کاملHardware synthesis of complex standard interfaces using CAL dataflow descriptions
This paper presents a contribution to the development of rapid prototyping tools based on dataflow description. In this context, the efficiency of automatic translator tools from the data-flow description to C and/or HDL are presented using two design cases. Moreover, this paper presents the novel concept of the automatic synthesis of interfaces based on dataflow description. Such “generic” int...
متن کامل